furiosa_visa_std/vector_engine/
alu.rs

1//! ALU definitions for Renegade vector engine.
2
3use std::fmt::{self, Display, Formatter};
4
5use furiosa_mapping_macro::primitive;
6
7/// Renegade ALU units.
8///
9/// Each ALU can only be used once per VE configuration.
10#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
11pub enum RngdAlu {
12    // Logic cluster (max 5 ops)
13    /// Logic AND ALU
14    LogicAnd,
15    /// Logic OR ALU
16    LogicOr,
17    /// Logic XOR ALU
18    LogicXor,
19    /// Logic left shift ALU
20    LogicLshift,
21    /// Logic right shift ALU
22    LogicRshift,
23
24    // Fxp cluster (max 4 ops)
25    /// Fixed-point add ALU
26    FxpAdd,
27    /// Fixed-point left shift ALU
28    FxpLshift,
29    /// Fixed-point multiply ALU
30    FxpMul,
31    /// Fixed-point right shift ALU
32    FxpRshift,
33
34    // Float cluster (max 5 ops)
35    /// Floating-point FMA ALU
36    FpFma,
37    /// Floating-point FPU ALU (sqrt, tanh, sigmoid, etc.)
38    FpFpu,
39    /// Floating-point exp ALU
40    FpExp,
41    /// Floating-point multiply ALU 0
42    FpMul0,
43    /// Floating-point multiply ALU 1
44    FpMul1,
45
46    // Clip cluster (max 3 ops)
47    /// Clip add ALU
48    ClipAdd,
49    /// Clip max ALU
50    ClipMax,
51    /// Clip min ALU
52    ClipMin,
53
54    // Reduce
55    /// Intra-slice reduce accumulator tree ALU
56    ReduceAccTree,
57    /// Reduce FP division ALU
58    ReduceFpDiv,
59}
60
61/// Float cluster Mul ALU selection.
62///
63/// Used to specify which ALU to use for MulF/MaskMulF operations,
64/// since they can use FpMul0, FpMul1, or FpFma.
65#[primitive(ve::FpMulAlu)]
66#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
67pub enum FpMulAlu {
68    /// Use FpMul0 ALU
69    Mul0,
70    /// Use FpMul1 ALU
71    Mul1,
72    /// Use FpFma ALU
73    Fma,
74}
75
76impl Display for FpMulAlu {
77    fn fmt(&self, f: &mut Formatter<'_>) -> fmt::Result {
78        match self {
79            Self::Mul0 => write!(f, "FpMulAlu::Mul0"),
80            Self::Mul1 => write!(f, "FpMulAlu::Mul1"),
81            Self::Fma => write!(f, "FpMulAlu::Fma"),
82        }
83    }
84}
85
86impl FpMulAlu {
87    /// Converts to the corresponding RngdAlu.
88    pub fn to_alu(self) -> RngdAlu {
89        match self {
90            FpMulAlu::Mul0 => RngdAlu::FpMul0,
91            FpMulAlu::Mul1 => RngdAlu::FpMul1,
92            FpMulAlu::Fma => RngdAlu::FpFma,
93        }
94    }
95}
furiosa_visa_std/vector_engine/alu.rs

furiosa_visa_std/vector_engine/
alu.rs
