Module prelude

Module prelude 

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Prelude module that re-exports commonly used items.

Re-exports§

pub use super::runtime::*;

Modules§

parser
Macros for virtual ISA.
semantics
Semantic implementations for VE operations.
stage
Vector Engine stage markers and state.

Macros§

axes
Macro to define shapes using axis names and sizes.
i
Macro for index expressions.
m
Macro for mapping expressions.

Structs§

AlignedPair
Pair of aligned tensors ready for contraction (Feed Buffer + TRF Sequencer output).
ArrayVec
Wrapper around arrayvec::ArrayVec that allows initialization with arrays smaller than capacity.
BlockBounds
Bounds for the padded block removed for a matched term.
ClipOpF
Clip cluster operations for f32 (internal, with mode).
ClipOpI
Clip cluster operations for i32 (internal, with mode).
Context
Device context.
ContractionTensor
Intermediate tensor after contraction (LAT reduce within Packet), before accumulation (accumulator reduce across Time).
Division
Result of dividing two factor mappings.
DivisionTerm
Information about a single matched term in a division.
DmTensor
Tensor stored in data memory.
DmTensorView
View of a data memory tensor.
DmTensorViewMut
Mutable view of a data memory tensor.
DmaContext
Context for a specific DMA engine.
DpeTensor
Tensor stored in dot product engine
FMapping
Factor mapping expression.
FpDivOp
Floating Point Division operation (internal, with mode).
FpToFxp
VectorEngine FpToFxp layer configuration.
FxpOp
Fxp cluster operations (internal, with mode).
FxpToFp
VectorEngine FxpToFp layer configuration.
HasTensor
A Tensor with scalar type D and memory layout Mapping is present.
HbmTensor
Tensor stored in HBM memory.
HbmTensorView
View of an HBM tensor.
HbmTensorViewMut
Mutable view of an HBM tensor.
HostTensor
Tensor stored in host memory.
Ident
Axis identifiers.
Identity
Identity expression.
Index
Index mapping for tensor operations.
LogicOpF
Logic cluster operations for f32 (internal, with mode).
LogicOpI
Logic cluster operations for i32 (internal, with mode).
Modulo
Modulo expression that represents modulo SIZE elements.
NoTensor
No tensor is present.
Padding
Add padding to increase an expression’s size.
Pair
Pair expression of two expressions.
PositionBegin
After beginning the pipeline.
PositionCast
After the cast engine.
PositionCollect
After the switch engine’s collect engine (32-byte packet normalized).
PositionContraction
After the contraction engine.
PositionFetch
After the fetch engine.
PositionSwitch
After the switch engine.
PositionTranspose
After the transpose engine.
PositionVectorFinal
After the vector engine (vector_final).
RSortedMap
A FFI-safe ordered map backed by a sorted RVec<Tuple2<K, V>>.
RawTensor
Tensor with scalar type D.
Relaxed
Marker for read-accessible division results.
Resize
Truncate expression to SIZE elements.
Span
Marker for span-division results without padding analysis.
Stash
Type-inferred stash marker for compile-time type checking.
StashOperand
Stash operand for Vector Engine operations.
StreamTensor
Tensor streamed through the pipeline.
Strict
Marker for analysis-capable division results.
Stride
Stride expression that represents one for every SIZE elements.
Symbol
Symbol expression that represents a single axis.
Tensor
Tensor with scalar type D with axes determined by Mapping.
Term
inner / stride % modulo.
TermBounds
Per-term compact padding bounds.
TermPosition
A Term factor with its position (stride) in an FMapping.
TernaryOperand
User-facing operand for ternary operations. Generic over Mapping to match the target tensor’s mapping from creation time. Ternary operations are only supported for f32 tensors.
TrfTensor
Tensor stored in the tensor register file.
TuContext
Context for a specific tensor unit.
VeBranchOperand
Operand with branch validity for multi-operand cases.
VeTensorData
Common tensor data for VE pipeline stages, without context reference. This expects sharing implementation between VectorTensor and VectorTensorPair groups.
VectorInitTensor
VE input after vector_init(), before choosing the first block.
VectorTensor
Unified tensor type for all VE pipeline stages.
VectorTensorPair
Pair of tensors that manages both groups together.
VrfTensor
Tensor stored in the vector register file (VRF).
bf16
16-bit brain floating point type.
f8
8-bit floating point type.
f8e4m3
8-bit floating point type with 4-bit exponent (E4M3).
i4
4-bit signed integer type.

Enums§

AccumulationKind
Contraction mode for accumulation.
ArgMode
Arg mode: what operand to use as each argument of the operator.
Atom
Atomic mapping expression.
BinaryArgMode
Binary arg mode. ModeXY: op(argX, argY) where 0=mainstream, 1=operand0
BranchMode
Branch mode configuration for Vector Engine.
ClipBinaryOpF32
Clip binary operations for f32 (user-facing, mode-free).
ClipBinaryOpI32
Clip binary operations for i32 (user-facing, mode-free).
DivisionError
Error during division of mapping expressions.
DivisionSide
Selects which side of a DivisionTerm to operate on.
Dma
DMA units.
Factor
Factor representation of a mapping expression.
FpBinaryOp
Fp binary operations (user-facing, mode-free).
FpDivBinaryOp
FpDiv binary operations (user-facing, mode-free).
FpMulAlu
Float cluster Mul ALU selection.
FpOp
Fp cluster operations (internal, with mode).
FpTernaryOp
Fp ternary operations (user-facing, mode-free).
FpUnaryOp
Fp unary operations (user-facing, mode-free).
FxpBinaryOp
Fxp cluster binary operations (user-facing, mode-free).
GroupId
GroupId: msb 1 bit of branch id.
IndexValueError
Error returned when querying ident contributions from an Index.
InputCmp
comparison operations for Vector Engine Branch Unit.
InputCmpF32
f32 comparison operations
InputCmpI32
i32 comparison operations
InterSliceReduceOpF32
Inter-slice reduce operations for f32 (VRU).
InterSliceReduceOpI32
Inter-slice reduce operations for i32 (VRU).
IntraSliceReduceOpF32
Intra-Slice Reduce operations for f32.
IntraSliceReduceOpI32
Intra-Slice Reduce operations for i32.
LogicBinaryOpF32
Logic cluster binary operations for f32 (user-facing, mode-free).
LogicBinaryOpI32
Logic cluster binary operations for i32 (user-facing, mode-free).
Mapping
Mapping expression enum.
Opt
A data type that can be either initialized or uninitialized.
PaddingKind
Kind of a padding factor.
RngdAlu
Renegade ALU units.
SwitchConfig
Configuration for the switch operation.
TernaryArgMode
Ternary arg mode. ModeXYZ: op(argX, argY, argZ) where 0=mainstream, 1=operand0, 2=operand1
TrfAddress
Address in the tensor register file.
Tu
Tensor units.
UnaryArgMode
Unary arg mode. Mode0: op(mainstream), Mode1: op(operand0)
ValidBranchIds
Branch ID configuration for Vector Engine operations.
VeOp
Vector Engine operations (unified enum for runtime storage).
VeOperand
Unified operand type for Vector Engine operations.
VeRhs
RHS operand for Vector Engine operations.
VeScalarKind
The kind of scalar type supported by Vector Engine.

Traits§

AtomExt
Methods for Atom.
AxisName
Marker trait for axis names. Implemented by types generated by axes!.
ContractionCast
Output type for contraction (DPE accumulates in wider type).
DivisionExt
Methods for Division<M>.
DivisionMode
Determines the padding kind used for matched-hole markers in division.
FMappingExt
Methods for FMapping.
FactorExt
Methods for Factor.
FetchCast
Trait for types that can be cast during fetch operations.
HasAlu
Trait for ops that provide ALU information.
HasBinaryOp
Trait for ops that provide binary operation function.
HasTernaryOp
Trait for ops that provide ternary operation function.
HasUnaryOp
Trait for ops that provide unary operation function.
IndexExt
Methods for Index.
IntoGroupOperand
Trait for converting various types into a group operand.
IntoGroupTernaryOperand
Trait for converting various types into a group ternary operand.
IntoOperands
Trait for converting various operand types into an ArrayVec.
IntoTernaryOperands
Trait for converting various operand types into an ArrayVec of TernaryOperand.
M
Mapping expression that describes memory layout and computes size for a given shape.
MappingExt
Methods for Mapping.
Position
Marker trait for pipeline position of stream tensors.
Scalar
A trait for scalar types.
ScalarBytes
A byte-aligned Scalar that can be decoded from its little-endian byte representation.
StreamCast
Trait for stream tensors that can be cast to a different scalar type.
StrictDivisionExt
Methods specific to Division<Strict>.
TensorState
Marker trait that tracks tensor presence at compile time.
TermExt
Methods for Term.
VeOperation
Common trait for Vector Engine operations.
VeScalar
Marker trait for scalar types supported by Vector Engine. Only i32 and f32 are supported.

Functions§

apply_branch_config
Applies branch unit to generate ExecutionId for each element.
assert_div
Asserts that dividing I from E results in E2 after removing padding.

Type Aliases§

AccumulationTensor
Tensor streamed after the contraction engine.
Address
Address.
BeginTensor
Tensor streamed after the beginning.
CastTensor
Tensor streamed after the cast engine.
CollectTensor
Tensor after collect engine: packet is exactly 32 bytes (one flit).
FetchTensor
Tensor streamed after the fetch engine.
GroupOperand
Type alias for group operand in VectorTensorPair operations. Generic over Mapping to match the target tensor’s mapping from creation time.
GroupTernaryOperand
Type alias for group ternary operand in VectorTensorPair operations.
SwitchTensor
Tensor streamed after the switch engine.
TransposeTensor
Tensor streamed after the transpose engine.
VectorBranchTensor
Tensor after branch unit.
VectorClipTensor
Tensor after clip operations.
VectorFilterTensor
Tensor after filter operation.
VectorFinalTensor
Tensor after the vector engine (after vector_final()).
VectorFpDivTensor
Tensor after fp division.
VectorFpTensor
Tensor after floating-point operations.
VectorFpToFxpTensor
Tensor after f32 to i32 conversion.
VectorFxpTensor
Tensor after fixed-point operations.
VectorFxpToFpTensor
Tensor after i32 to f32 conversion.
VectorInterSliceReduceTensor
Tensor after inter-slice reduce.
VectorIntraSliceReduceTensor
Tensor after intra-slice reduce operations.
VectorLogicTensor
Tensor after logic operations.
VectorNarrowTensor
Tensor after narrow layer (split or trim).
VectorWidenTensor
Tensor after widen layer (concat or pad).

Attribute Macros§

device
Marks a function as a device entry point for launch().