Struct VectorTensorPair 

pub struct VectorTensorPair<'l, const T: Tu, D: VeScalar, S: Stage, Chip: M, Cluster: M, Slice: M, SplitTime: M, Packet: M, const W: PacketMode = { Way8 }> { /* private fields */ }

Pair of tensors that manages both groups together.

Unified operations apply to both groups simultaneously:

• vector_fxp(), vector_logic(), vector_clip(), etc.
• Each takes GroupOperand for both groups; None skips the operation for that group

Common operations (FxpToFp, Narrow, Widen, FpToFxp) apply to both sides simultaneously.

After a binary operation (vector_clip_zip, vector_fxp_zip, etc.), the pair is combined into a single VectorTensor with Zipped state.

Each group uses VeTensorData with Group state, which prevents:

• stash() operations on individual groups
• Common operations (fxp_to_fp, split, concat, fp_to_fxp) on individual groups

Implementations

impl<'l, const T: Tu, S: Stage + CanTransitionTo<Logic>, Chip: M, Cluster: M, Slice: M, SplitTime: M, Packet: M> VectorTensorPair<'l, T, i32, S, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

pub fn vector_logic( self, op: LogicBinaryOpI32, group0_operand: impl IntoGroupOperand<i32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, group1_operand: impl IntoGroupOperand<i32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, ) -> VectorTensorPair<'l, T, i32, Logic, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

Logic binary operation on both groups simultaneously. Requires Way8 mode.

Arguments

• op - The logic binary operation to apply
• group0_operand - Operand for Group 0. Use () to skip, or i32 for constant
• group1_operand - Operand for Group 1. Use () to skip, or i32 for constant

Stage Transition

Both groups transition to stage::Logic regardless of whether operands are provided.

pub fn vector_logic_with_mode( self, op: LogicBinaryOpI32, mode: BinaryArgMode, group0_operand: impl IntoGroupOperand<i32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, group1_operand: impl IntoGroupOperand<i32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, ) -> VectorTensorPair<'l, T, i32, Logic, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

Logic binary operation on both groups simultaneously with explicit mode. Requires Way8 mode. In this paired form, BinaryArgMode is interpreted independently inside each group: 0 means that group’s stream and 1 means that group’s operand.

impl<'l, const T: Tu, S: Stage + CanTransitionTo<Logic>, Chip: M, Cluster: M, Slice: M, SplitTime: M, Packet: M> VectorTensorPair<'l, T, f32, S, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

pub fn vector_logic( self, op: LogicBinaryOpF32, group0_operand: impl IntoGroupOperand<f32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, group1_operand: impl IntoGroupOperand<f32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, ) -> VectorTensorPair<'l, T, f32, Logic, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

Logic binary operation on both groups simultaneously. Requires Way8 mode.

Arguments

• op - The logic binary operation to apply
• group0_operand - Operand for Group 0. Use () to skip, or f32 for constant
• group1_operand - Operand for Group 1. Use () to skip, or f32 for constant

Stage Transition

Both groups transition to stage::Logic regardless of whether operands are provided.

pub fn vector_logic_with_mode( self, op: LogicBinaryOpF32, mode: BinaryArgMode, group0_operand: impl IntoGroupOperand<f32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, group1_operand: impl IntoGroupOperand<f32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, ) -> VectorTensorPair<'l, T, f32, Logic, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

Logic binary operation on both groups simultaneously with explicit mode. Requires Way8 mode. In this paired form, BinaryArgMode is interpreted independently inside each group: 0 means that group’s stream and 1 means that group’s operand.

impl<'l, const T: Tu, S: Stage + CanTransitionTo<Fxp>, Chip: M, Cluster: M, Slice: M, SplitTime: M, Packet: M> VectorTensorPair<'l, T, i32, S, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

pub fn vector_fxp( self, op: FxpBinaryOp, group0_operand: impl IntoGroupOperand<i32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, group1_operand: impl IntoGroupOperand<i32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, ) -> VectorTensorPair<'l, T, i32, Fxp, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

Fixed-point binary operation on both groups simultaneously. Requires Way8 mode.

Arguments

• op - The fixed-point binary operation to apply
• group0_operand - Operand for Group 0. Use () to skip, or i32 for constant
• group1_operand - Operand for Group 1. Use () to skip, or i32 for constant

Stage Transition

Both groups transition to stage::Fxp regardless of whether operands are provided.

Example

.vector_fxp(FxpBinaryOp::MulInt, 16384, ())  // Apply to group0 only
.vector_fxp(FxpBinaryOp::MulInt, (), 16384)  // Apply to group1 only
.vector_fxp(FxpBinaryOp::MulInt, 16384, 32768)  // Apply to both

pub fn vector_fxp_with_mode( self, op: FxpBinaryOp, mode: BinaryArgMode, group0_operand: impl IntoGroupOperand<i32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, group1_operand: impl IntoGroupOperand<i32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, ) -> VectorTensorPair<'l, T, i32, Fxp, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

Fixed-point binary operation on both groups simultaneously with explicit mode. Requires Way8 mode. In this paired form, BinaryArgMode is interpreted independently inside each group: 0 means that group’s stream and 1 means that group’s operand.

impl<'l, const T: Tu, S: Stage + CanTransitionTo<FxpToFp>, Chip: M, Cluster: M, Slice: M, SplitTime: M, Packet: M> VectorTensorPair<'l, T, i32, S, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

pub fn vector_fxp_to_fp( self, int_width: u32, ) -> VectorTensorPair<'l, T, f32, FxpToFp, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

Converts i32 to f32 for both groups simultaneously. Requires Way8 mode. This is a common operation that must be applied to both groups.

impl<'l, const T: Tu, D: VeScalar, S: Stage + CanTransitionTo<Narrow>, Chip: M, Cluster: M, Slice: M, SplitTime: M, Packet: M> VectorTensorPair<'l, T, D, S, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

pub fn vector_split<SplitTime2: M, Packet2: M>( self, ) -> VectorTensorPair<'l, T, D, Narrow, Chip, Cluster, Slice, SplitTime2, Packet2, { Way4 }>

Narrow layer (split) operation for both groups simultaneously. Requires Way8 mode.

Takes an 8-element packet in each group, splits it into front 4 + back 4. The factor of 2 goes into SplitTime, output is Way4 with 4-element packets. Output: SplitTime2 = SplitTime × 2, Packet2 = front 4 of Packet (size 4).

impl<'l, const T: Tu, S: Stage + CanTransitionTo<Fp>, Chip: M, Cluster: M, Slice: M, SplitTime: M, Packet: M> VectorTensorPair<'l, T, f32, S, Chip, Cluster, Slice, SplitTime, Packet, { Way4 }>

pub fn vector_fp_unary( self, op: FpUnaryOp, group0_apply: bool, group1_apply: bool, ) -> VectorTensorPair<'l, T, f32, Fp, Chip, Cluster, Slice, SplitTime, Packet, { Way4 }>

Floating-point unary operation on both groups simultaneously.

Arguments

• op - The floating-point unary operation to apply
• group0_apply - Whether to apply to Group 0
• group1_apply - Whether to apply to Group 1

pub fn vector_fp_unary_with_mode( self, op: FpUnaryOp, mode: UnaryArgMode, group0_apply: bool, group1_apply: bool, ) -> VectorTensorPair<'l, T, f32, Fp, Chip, Cluster, Slice, SplitTime, Packet, { Way4 }>

Floating-point unary operation on both groups with explicit mode.

pub fn vector_fp_binary( self, op: FpBinaryOp, group0_operand: impl IntoGroupOperand<f32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, group1_operand: impl IntoGroupOperand<f32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, ) -> VectorTensorPair<'l, T, f32, Fp, Chip, Cluster, Slice, SplitTime, Packet, { Way4 }>

Floating-point binary operation on both groups simultaneously.

Arguments

• op - The floating-point binary operation to apply
• group0_operand - Operand for Group 0. Use () to skip
• group1_operand - Operand for Group 1. Use () to skip

pub fn vector_fp_binary_with_mode( self, op: FpBinaryOp, mode: BinaryArgMode, group0_operand: impl IntoGroupOperand<f32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, group1_operand: impl IntoGroupOperand<f32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, ) -> VectorTensorPair<'l, T, f32, Fp, Chip, Cluster, Slice, SplitTime, Packet, { Way4 }>

Floating-point binary operation on both groups with explicit mode. In this paired form, BinaryArgMode is interpreted independently inside each group: 0 means that group’s stream and 1 means that group’s operand.

pub fn vector_fp_ternary( self, op: FpTernaryOp, group0_operand: impl IntoGroupTernaryOperand<Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, group1_operand: impl IntoGroupTernaryOperand<Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, ) -> VectorTensorPair<'l, T, f32, Fp, Chip, Cluster, Slice, SplitTime, Packet, { Way4 }>

Floating-point ternary operation on both groups simultaneously.

Arguments

• op - The floating-point ternary operation to apply
• group0_operand - Operand for Group 0. Use () to skip, or (f32, f32) for constants
• group1_operand - Operand for Group 1. Use () to skip, or (f32, f32) for constants

Example

// Apply ternary op only to group0
pair.vector_fp_ternary(op, (2.0f32, 3.0f32), ())

// Apply to both groups with different operands
pair.vector_fp_ternary(op, (2.0f32, 3.0f32), (4.0f32, 5.0f32))

// With stash as operand0 for group0
pair.vector_fp_ternary(op, (Stash, 3.0f32), ())

pub fn vector_fp_ternary_with_mode( self, op: FpTernaryOp, mode: TernaryArgMode, group0_operand: impl IntoGroupTernaryOperand<Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, group1_operand: impl IntoGroupTernaryOperand<Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, ) -> VectorTensorPair<'l, T, f32, Fp, Chip, Cluster, Slice, SplitTime, Packet, { Way4 }>

Floating-point ternary operation on both groups with explicit mode.

impl<'l, const T: Tu, S: Stage + CanTransitionTo<FpDiv>, Chip: M, Cluster: M, Slice: M, SplitTime: M, Packet: M> VectorTensorPair<'l, T, f32, S, Chip, Cluster, Slice, SplitTime, Packet, { Way4 }>

pub fn vector_fp_div( self, op: FpDivBinaryOp, group0_operand: impl IntoGroupOperand<f32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, group1_operand: impl IntoGroupOperand<f32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, ) -> VectorTensorPair<'l, T, f32, FpDiv, Chip, Cluster, Slice, SplitTime, Packet, { Way4 }>

Floating-point division on both groups simultaneously.

Arguments

• op - The fp div binary operation to apply
• group0_operand - Operand for Group 0. Use () to skip, or f32 for constant
• group1_operand - Operand for Group 1. Use () to skip, or f32 for constant

Stage Transition

Both groups transition to stage::FpDiv regardless of whether operands are provided.

pub fn vector_fp_div_with_mode( self, op: FpDivBinaryOp, mode: BinaryArgMode, group0_operand: impl IntoGroupOperand<f32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, group1_operand: impl IntoGroupOperand<f32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, ) -> VectorTensorPair<'l, T, f32, FpDiv, Chip, Cluster, Slice, SplitTime, Packet, { Way4 }>

Floating-point division on both groups simultaneously with explicit mode. In this paired form, BinaryArgMode is interpreted independently inside each group: 0 means that group’s stream and 1 means that group’s operand.

impl<'l, const T: Tu, D: VeScalar, S: Stage + CanTransitionTo<Widen>, Chip: M, Cluster: M, Slice: M, SplitTime: M, Packet: M> VectorTensorPair<'l, T, D, S, Chip, Cluster, Slice, SplitTime, Packet, { Way4 }>

pub fn vector_concat<SplitTime2: M, Packet2: M>( self, ) -> VectorTensorPair<'l, T, D, Widen, Chip, Cluster, Slice, SplitTime2, Packet2, { Way8 }>

Widen layer (concat) operation for both groups simultaneously. Requires Way4 mode.

Reverse of split. Takes 4-element packets from 2 consecutive time steps, merges them into one 8-element packet and transitions to Way8. SplitTime2 = SplitTime / 2, Packet2 = Packet combined with factor of 2 from Time.

impl<'l, const T: Tu, S: Stage + CanTransitionTo<FpToFxp>, Chip: M, Cluster: M, Slice: M, SplitTime: M, Packet: M> VectorTensorPair<'l, T, f32, S, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

pub fn vector_fp_to_fxp( self, int_width: u32, ) -> VectorTensorPair<'l, T, i32, FpToFxp, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

Converts f32 to i32 for both groups simultaneously. Requires Way8 mode. This is a common operation that must be applied to both groups.

impl<'l, const T: Tu, S: Stage + CanTransitionTo<Clip>, Chip: M, Cluster: M, Slice: M, SplitTime: M, Packet: M> VectorTensorPair<'l, T, i32, S, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

pub fn vector_clip( self, op: ClipBinaryOpI32, group0_operand: impl IntoGroupOperand<i32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, group1_operand: impl IntoGroupOperand<i32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, ) -> VectorTensorPair<'l, T, i32, Clip, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

Clip binary operation on both groups simultaneously. Requires Way8 mode.

Arguments

• op - The clip binary operation to apply
• group0_operand - Operand for Group 0. Use () to skip, or i32 for constant
• group1_operand - Operand for Group 1. Use () to skip, or i32 for constant

Stage Transition

Both groups transition to stage::Clip regardless of whether operands are provided.

pub fn vector_clip_with_mode( self, op: ClipBinaryOpI32, mode: BinaryArgMode, group0_operand: impl IntoGroupOperand<i32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, group1_operand: impl IntoGroupOperand<i32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, ) -> VectorTensorPair<'l, T, i32, Clip, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

Clip binary operation on both groups simultaneously with explicit mode. Requires Way8 mode. In this paired form, BinaryArgMode is interpreted independently inside each group: 0 means that group’s stream and 1 means that group’s operand.

impl<'l, const T: Tu, S: Stage + CanTransitionTo<Clip>, Chip: M, Cluster: M, Slice: M, SplitTime: M, Packet: M> VectorTensorPair<'l, T, f32, S, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

pub fn vector_clip( self, op: ClipBinaryOpF32, group0_operand: impl IntoGroupOperand<f32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, group1_operand: impl IntoGroupOperand<f32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, ) -> VectorTensorPair<'l, T, f32, Clip, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

Clip binary operation on both groups simultaneously. Requires Way8 mode.

Arguments

• op - The clip binary operation to apply
• group0_operand - Operand for Group 0. Use () to skip, or f32 for constant
• group1_operand - Operand for Group 1. Use () to skip, or f32 for constant

Stage Transition

Both groups transition to stage::Clip regardless of whether operands are provided.

pub fn vector_clip_with_mode( self, op: ClipBinaryOpF32, mode: BinaryArgMode, group0_operand: impl IntoGroupOperand<f32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, group1_operand: impl IntoGroupOperand<f32, Pair<Chip, Pair<Cluster, Pair<Slice, Pair<SplitTime, Packet>>>>>, ) -> VectorTensorPair<'l, T, f32, Clip, Chip, Cluster, Slice, SplitTime, Packet, { Way8 }>

Clip binary operation on both groups simultaneously with explicit mode. Requires Way8 mode. In this paired form, BinaryArgMode is interpreted independently inside each group: 0 means that group’s stream and 1 means that group’s operand.

impl<'l, const T: Tu, S: Stage + CanTransitionTo<Logic>, Chip: M, Cluster: M, Slice: M, Time: M, Packet: M> VectorTensorPair<'l, T, i32, S, Chip, Cluster, Slice, Time, Packet, { Way8 }>

pub fn vector_logic_zip( self, op: LogicBinaryOpI32, ) -> VectorLogicTensor<'l, T, i32, Chip, Cluster, Slice, Time, Packet, i32, NoTensor, { VeOrder::IntraFirst }, Zipped, { Way8 }>

Binary logic operation merging Group 0 and Group 1. Requires Way8 mode. Result = op(group0, group1), result is placed in Group 1 positions. Returns VectorTensor with Zipped state (filter/stash not available).

pub fn vector_logic_zip_with_mode( self, op: LogicBinaryOpI32, mode: BinaryArgMode, ) -> VectorLogicTensor<'l, T, i32, Chip, Cluster, Slice, Time, Packet, i32, NoTensor, { VeOrder::IntraFirst }, Zipped, { Way8 }>

Binary logic operation merging Group 0 and Group 1 with explicit mode. Requires Way8 mode. In this zipped form, BinaryArgMode uses the two grouped streams directly: 0 means Group 0 and 1 means Group 1.

impl<'l, const T: Tu, S: Stage + CanTransitionTo<Logic>, Chip: M, Cluster: M, Slice: M, Time: M, Packet: M> VectorTensorPair<'l, T, f32, S, Chip, Cluster, Slice, Time, Packet, { Way8 }>

pub fn vector_logic_zip( self, op: LogicBinaryOpF32, ) -> VectorLogicTensor<'l, T, f32, Chip, Cluster, Slice, Time, Packet, f32, NoTensor, { VeOrder::IntraFirst }, Zipped, { Way8 }>

Binary logic operation merging Group 0 and Group 1. Requires Way8 mode. Result = op(group0, group1), result is placed in Group 1 positions. Returns VectorTensor with Zipped state (filter/stash not available).

pub fn vector_logic_zip_with_mode( self, op: LogicBinaryOpF32, mode: BinaryArgMode, ) -> VectorLogicTensor<'l, T, f32, Chip, Cluster, Slice, Time, Packet, f32, NoTensor, { VeOrder::IntraFirst }, Zipped, { Way8 }>

Binary logic operation merging Group 0 and Group 1 with explicit mode. Requires Way8 mode. In this zipped form, BinaryArgMode uses the two grouped streams directly: 0 means Group 0 and 1 means Group 1.

impl<'l, const T: Tu, S: Stage + CanTransitionTo<Fxp>, Chip: M, Cluster: M, Slice: M, Time: M, Packet: M> VectorTensorPair<'l, T, i32, S, Chip, Cluster, Slice, Time, Packet, { Way8 }>

pub fn vector_fxp_zip( self, op: FxpBinaryOp, ) -> VectorFxpTensor<'l, T, i32, Chip, Cluster, Slice, Time, Packet, i32, NoTensor, { VeOrder::IntraFirst }, Zipped, { Way8 }>

Binary fxp operation merging Group 0 and Group 1. Requires Way8 mode. Result = op(group0, group1), result is placed in Group 1 positions. Returns VectorTensor with Zipped state (filter/stash not available).

pub fn vector_fxp_zip_with_mode( self, op: FxpBinaryOp, mode: BinaryArgMode, ) -> VectorFxpTensor<'l, T, i32, Chip, Cluster, Slice, Time, Packet, i32, NoTensor, { VeOrder::IntraFirst }, Zipped, { Way8 }>

Binary fxp operation merging Group 0 and Group 1 with explicit mode. Requires Way8 mode. In this zipped form, BinaryArgMode uses the two grouped streams directly: 0 means Group 0 and 1 means Group 1.

impl<'l, const T: Tu, S: Stage + CanTransitionTo<Fp>, Chip: M, Cluster: M, Slice: M, Time: M, Packet: M> VectorTensorPair<'l, T, f32, S, Chip, Cluster, Slice, Time, Packet, { Way4 }>

pub fn vector_fp_zip( self, op: FpBinaryOp, ) -> VectorFpTensor<'l, T, f32, Chip, Cluster, Slice, Time, Packet, f32, NoTensor, { VeOrder::IntraFirst }, Zipped, { Way4 }>

Binary fp operation merging Group 0 and Group 1. Result = op(group0, group1), result is placed in Group 1 positions. Returns VectorTensor with Zipped state (filter/stash not available).

pub fn vector_fp_zip_with_mode( self, op: FpBinaryOp, mode: BinaryArgMode, ) -> VectorFpTensor<'l, T, f32, Chip, Cluster, Slice, Time, Packet, f32, NoTensor, { VeOrder::IntraFirst }, Zipped, { Way4 }>

Binary fp operation merging Group 0 and Group 1 with explicit mode. In this zipped form, BinaryArgMode uses the two grouped streams directly: 0 means Group 0 and 1 means Group 1.

impl<'l, const T: Tu, S: Stage + CanTransitionTo<Clip>, Chip: M, Cluster: M, Slice: M, Time: M, Packet: M> VectorTensorPair<'l, T, i32, S, Chip, Cluster, Slice, Time, Packet, { Way8 }>

pub fn vector_clip_zip( self, op: ClipBinaryOpI32, ) -> VectorClipTensor<'l, T, i32, Chip, Cluster, Slice, Time, Packet, i32, NoTensor, { VeOrder::IntraFirst }, Zipped, { Way8 }>

Binary clip operation merging Group 0 and Group 1. Requires Way8 mode. Result = op(group0, group1), result is placed in Group 1 positions. Returns VectorTensor with Zipped state (filter/stash not available).

pub fn vector_clip_zip_with_mode( self, op: ClipBinaryOpI32, mode: BinaryArgMode, ) -> VectorClipTensor<'l, T, i32, Chip, Cluster, Slice, Time, Packet, i32, NoTensor, { VeOrder::IntraFirst }, Zipped, { Way8 }>

Binary clip operation merging Group 0 and Group 1 with explicit mode. Requires Way8 mode. In this zipped form, BinaryArgMode uses the two grouped streams directly: 0 means Group 0 and 1 means Group 1.

impl<'l, const T: Tu, S: Stage + CanTransitionTo<Clip>, Chip: M, Cluster: M, Slice: M, Time: M, Packet: M> VectorTensorPair<'l, T, f32, S, Chip, Cluster, Slice, Time, Packet, { Way8 }>

pub fn vector_clip_zip( self, op: ClipBinaryOpF32, ) -> VectorClipTensor<'l, T, f32, Chip, Cluster, Slice, Time, Packet, f32, NoTensor, { VeOrder::IntraFirst }, Zipped, { Way8 }>

Binary clip operation merging Group 0 and Group 1. Requires Way8 mode. Result = op(group0, group1), result is placed in Group 1 positions. Returns VectorTensor with Zipped state (filter/stash not available).

pub fn vector_clip_zip_with_mode( self, op: ClipBinaryOpF32, mode: BinaryArgMode, ) -> VectorClipTensor<'l, T, f32, Chip, Cluster, Slice, Time, Packet, f32, NoTensor, { VeOrder::IntraFirst }, Zipped, { Way8 }>

Binary clip operation merging Group 0 and Group 1 with explicit mode. Requires Way8 mode. In this zipped form, BinaryArgMode uses the two grouped streams directly: 0 means Group 0 and 1 means Group 1.

Trait Implementations

impl<'l, const T: Tu, D: Debug + VeScalar, S: Debug + Stage, Chip: Debug + M, Cluster: Debug + M, Slice: Debug + M, SplitTime: Debug + M, Packet: Debug + M, const W: PacketMode> Debug for VectorTensorPair<'l, T, D, S, Chip, Cluster, Slice, SplitTime, Packet, W>

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.